PWM Technique of Dual Inverter With an Isolated DC Bus Considering Power Factor to Minimize and Balance Power Loss

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초록

This article proposes a clamping modulation technique considering the power factor to balance and minimize power loss in a dual inverter with an isolated dc bus. The dual inverter, used to drive an open-end winding permanent magnet synchronous motor can output a higher voltage than a single inverter with respect to the same dc voltage. However, the dual inverter, which has six legs, has twice as many switching actions as a single inverter composed of three legs during one switching period. The increased switching actions cause power loss of the switch and reduce the efficiency of the system. In this article, a new pulsewidth modulation technique is proposed that secures the clamping sections by using switching state combinations and space vector combinations to minimize power loss. The proposed combinations consist of active vectors and zero vectors corresponding to space vectors considering the relationship between the voltage vectors of the primary and secondary inverters to clamp four of the six legs. The switching state combinations are configured differently for sectors divided by the angle of the stator current to select the clamping sections considering the power factor. In addition, they equalize the upper and lower clamping sections by distributing the zero vectors. The validity of the proposed technique is verified through simulation and experiment.

키워드

SwitchesInvertersClampsLegged locomotionVoltageStatorsReactive powerVectorsPropulsionAerospace electronicsClamping sectionsdual inverter with an isolated dc buspower factorpower lossspace vector combinationswitching state combinationINDUCTION-MOTOR DRIVECOMMON-MODE VOLTAGESPACE-VECTORSWITCHING LOSSESMODULATIONSTRATEGYCONVERTERSCHEME
제목
PWM Technique of Dual Inverter With an Isolated DC Bus Considering Power Factor to Minimize and Balance Power Loss
저자
Kim, Tae-HyeongLee, June-HeeKim, Ye-JinLee, June-Seok
DOI
10.1109/TPEL.2024.3499915
발행일
2025-03
유형
Article
저널명
IEEE Transactions on Power Electronics
40
3
페이지
4303 ~ 4313